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The Floating Point Cores provide IEEE754-1985 compliant single and double precision floating point for SOCs. Floating point operations include addition, subtraction, multiplication, division, square root, conversions, and comparisons. All four IEEE rounding modes- round to nearest, round to zero, round to positive infinity, and round to negative infinity, are implemented. All five IEEE floating point traps are detected- invalid operation, underflow, overflow, inexact, and divide by zero. The Floating Point Cores are available as synthesizable Verilog models from Aurora VLSI, Inc. Contact CustomerService@auroravlsi.com.
Floating Point Core features are summarized:
- IEEE754-1985 floating point
- Fully compliant results for all floating point instructions computed in hardware
- Single and double precision
- Pipelined for highest performance
- Four rounding modes- round to nearest, to positive infinity, to negative infinity, to zero
- Detects five IEEE floaing point exceptions- inexact, overflow, underflow, invalid, divide by zero
- Denorms are fully handled in hardware
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